The need for advanced systems to meet shrinking fit and form factors and yet handle increasing thermal loads is greater than ever.  For the last five years, STI Electronics has been developing an innovative approach to the assembling and manufacturing of electronics.  Imbedded Component/Die Technology (IC/DT^®) is a variance of chip-on-board technology utilizing the smallest form factor components, i.e. bare die.  External packaging is removed thus reducing size, weight, electrical and thermal impedance, and failure opportunities at the first level.  The unpackaged die are then placed on inner layers of an organic laminate substrate through cavities, or recesses, in a three-dimensional array.  An inner thermal core in the laminate substrate provides mechanical rigidity and an internal heat sink for passive cooling of high power devices.  Electrical interconnects are achieved via wire bonds which provide stress relief in high shock and vibration environments.  Additional materials are used to protect the bare die and wire bonds in harsh environments, leading to a robust and reliable assembly technology for military and aerospace application.

 

Recently, STI was approached to evaluate IC/DT^® in a current military system.  Provided with an electrical schematic, STI was able to cross-reference conventional through-hole and surface mount components to bare die and re-layout the printed circuit board using IC/DT^® design guidelines.  A 66% reduction in assembly size was achieved through utilizing the IC/DT^® design process.  Successful system-level electrical test results have further reinforced the true advantages of designing with IC/DT^®.  A live test shot was successfully conducted in October 2007 as a technology demonstration of STI's Imbedded Component/Die Technology.  Several other military systems are currently being evaluated for redesign with IC/DT^® as this assembly and manufacturing technology transitions from a research and development stage to a proven assembly process.

 

Imbedded Component/Die Technology is also currently being implemented in three SBIR efforts.  STI's IC/DT^® packaging approach addresses miniaturization, thermal management, performance, reliability, and system capability requirements through innovative design guidelines and materials selection in order to meet form, fit, and function requirements.  Elimination of external component packaging not only reduces circuit card assembly (CCA) size, weight, and electrical and thermal parasitics, but it enables the three-dimensional (3-D) assembly of multiple components facilitating the design integration of key subsystems, i.e. multiple CCAs, into a single high-density module.  Contact us to learn more about how IC/DT^® can meet your SWAP (size, weight, and power), and/or functional requirements.

 

The increasing interest in IC/DT^® has created the need for a larger assembly and manufacturing laboratory to continue research and development as well as low volume microelectronics packaging.  STI has recently constructed the Microelectronics Laboratory, over 1000 sq. ft. of cleanroom laboratory space, to create a controlled environment with the low concentration of particles necessary for an ISO Class 6 (Class 1000) cleanroom.  Tightly controlled temperature and humidity coupled with ionizers on every filter fan unit (FFU) increase static control and reduce the opportunities for ESD damage.  The Class 1000 cleanroom is outfitted with the latest microelectronics packaging equipment for increased process control and reliability.  A plasma etching system, high accuracy dispenser and pick and place, vacuum bake oven, and wire bonder offer a complete solution to your microelectronics assembly needs.

 

Imbedded Component/Die Technology Literature

IC/DT® Information	Size in KB	Date
IC/DT® Info Sheet	1028	current	Download
IC/DT® Quad Chart Summary	70	current	Download
IC/DT® Flyer	814	current	Download
SMTA Pan Pacific Symposium Paper (2004)	151	2/10/2004	Download
Circuits Assembly Article (March 2004)	-	3/01/2004	Download
Microelectronics Lab Press Release	73	12/05/2006	Download
IC/DT® Patent Press Release	116	12/07/2006	Download
SM-2 Test Shot Press Release	581	10/23/2007	Download
SMTA-I Paper(2008)	1217	9/06/2008	Download
SMTA-I Paper (2009)	6646	9/12/2009	Download

 Please contact the Microelectronics Lab for additional information regarding IC/DT^®.

 

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